From fe794c6725192c794faebc3834f5561a0093367b Mon Sep 17 00:00:00 2001 From: Joel Beckmeyer Date: Mon, 24 Apr 2017 22:18:06 -0400 Subject: [PATCH] make parseCircuit() push gates onto input wire gates vector --- src/Simulation.cpp | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/src/Simulation.cpp b/src/Simulation.cpp index fa0b7de..732a11c 100644 --- a/src/Simulation.cpp +++ b/src/Simulation.cpp @@ -32,49 +32,71 @@ bool Simulation::parseCircuit(string fileName) in >> tmp2; tmpGate = new NotGate(getDelay(tmpString), findWire(tmp1), findWire(tmp2)); + + // push gate onto Simulation gates vector gates.push_back(tmpGate); + // also push gate onto input wire's gate vector + findWire(tmp1)->addGate(tmpGate); } else if (tmpType == "AND") { in >> tmp2; in >> tmp3; tmpGate = new AndGate(getDelay(tmpString), findWire(tmp1), findWire(tmp2), findWire(tmp3)); + gates.push_back(tmpGate); + findWire(tmp1)->addGate(tmpGate); + findWire(tmp2)->addGate(tmpGate); } else if (tmpType == "NAND") { in >> tmp2; in >> tmp3; tmpGate = new NandGate(getDelay(tmpString), findWire(tmp1), findWire(tmp2), findWire(tmp3)); + gates.push_back(tmpGate); + findWire(tmp1)->addGate(tmpGate); + findWire(tmp2)->addGate(tmpGate); } else if (tmpType == "OR") { in >> tmp2; in >> tmp3; tmpGate = new OrGate(getDelay(tmpString), findWire(tmp1), findWire(tmp2), findWire(tmp3)); + gates.push_back(tmpGate); + findWire(tmp1)->addGate(tmpGate); + findWire(tmp2)->addGate(tmpGate); } else if (tmpType == "XOR") { in >> tmp2; in >> tmp3; tmpGate = new XorGate(getDelay(tmpString), findWire(tmp1), findWire(tmp2), findWire(tmp3)); + gates.push_back(tmpGate); + findWire(tmp1)->addGate(tmpGate); + findWire(tmp2)->addGate(tmpGate); } else if (tmpType == "NOR") { in >> tmp2; in >> tmp3; tmpGate = new NorGate(getDelay(tmpString), findWire(tmp1), findWire(tmp2), findWire(tmp3)); + gates.push_back(tmpGate); + findWire(tmp1)->addGate(tmpGate); + findWire(tmp2)->addGate(tmpGate); } else if (tmpType == "XNOR") { in >> tmp2; in >> tmp3; tmpGate = new XnorGate(getDelay(tmpString), findWire(tmp1), findWire(tmp2), findWire(tmp3)); + gates.push_back(tmpGate); + findWire(tmp1)->addGate(tmpGate); + findWire(tmp2)->addGate(tmpGate); } } return true;