TnSb/radec

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daniel 7574ffc9a4 Fix base initialization for and, not , and xor

2017-04-10 21:28:44 -04:00

Define the wire class

2017-04-10 18:57:03 -04:00

Fix base initialization for and, not , and xor

2017-04-10 21:28:44 -04:00

.gitattributes

Add the basic class defineition for Wire and Gate.

2017-04-04 13:37:46 -04:00

.gitignore

Add the basic class defineition for Wire and Gate.

2017-04-04 13:37:46 -04:00

readme.md

implement event class

2017-04-10 17:15:05 -04:00

readme.md

RADEC

TODO

implement vector file parsing
define all classes more completely