A simple, terminal-based boolean logic simulator

logic logic-circuit logic-gates terminal-based

Go to file

Joel Beckmeyer b326f08971 fix several data member/member function confuzzlings		2017-04-24 21:15:16 -04:00
Radec	Fix the gate evaluate definition to return event	2017-04-23 19:29:29 -04:00
circuit	add the amazing test cases	2017-04-23 20:57:44 -04:00
src	fix several data member/member function confuzzlings	2017-04-24 21:15:16 -04:00
.gitattributes	Add the basic class defineition for Wire and Gate.	2017-04-04 13:37:46 -04:00
.gitignore	Add the basic class defineition for Wire and Gate.	2017-04-04 13:37:46 -04:00
readme.md	actually update readme	2017-04-23 20:32:31 -04:00

readme.md

RADEC

TODO

implement printing
debug: circuit parsing
debug: vector parsing
debug: simulation
debug: printing