Commit Graph

89 Commits

Author SHA1 Message Date
Joel Beckmeyer
b326f08971 fix several data member/member function confuzzlings 2017-04-24 21:15:16 -04:00
Joel Beckmeyer
75f7f3abd9 Merge branch 'master' of https://gitlab.com/AluminumTank/radec 2017-04-24 21:09:55 -04:00
Joel Beckmeyer
6f256eb395 add print function 2017-04-24 21:09:38 -04:00
daniel
a005f92560 Merge branch 'master' of https://daniel12997@gitlab.com/AluminumTank/radec.git 2017-04-24 21:06:00 -04:00
daniel
3e968534ed add the print operator to the wire class 2017-04-24 21:05:59 -04:00
Joel Beckmeyer
081330103c implement print() and fix simulate() 2017-04-24 20:24:39 -04:00
Joel Beckmeyer
c4c62ed53b Implement simulate() 2017-04-24 20:14:22 -04:00
daniel
7475eb8087 Add getters for the event class. Add getGate function to wire class. 2017-04-24 20:13:22 -04:00
daniel
496b61d77b Merge branch 'master' of https://daniel12997@gitlab.com/AluminumTank/radec.git 2017-04-24 19:37:12 -04:00
Joel Beckmeyer
d692c5ff3a make wire instantiation great again 2017-04-24 19:36:08 -04:00
daniel
985e6c0c4d Add convertToIO to the wire class 2017-04-24 19:35:30 -04:00
Joel Beckmeyer
217e1aab71 remove newline from prompt 2017-04-23 21:02:10 -04:00
Joel Beckmeyer
2a7d351dec ask for input 2017-04-23 21:00:56 -04:00
Joel Beckmeyer
9264dbbeda add the amazing test cases 2017-04-23 20:57:44 -04:00
daniel
0e751426ad fix joel's mistake 2017-04-23 20:53:17 -04:00
daniel
0d6b814860 fix the gate.cpp filename 2017-04-23 20:48:33 -04:00
Joel Beckmeyer
d07406cd58 fix double pointer stupidity 2017-04-23 20:44:45 -04:00
daniel
e4d4adc2ce Merge branch 'master' of https://daniel12997@gitlab.com/AluminumTank/radec.git 2017-04-23 20:43:11 -04:00
daniel
a225318882 add scope resolution to parseVector 2017-04-23 20:43:08 -04:00
Joel Beckmeyer
dd7fb51200 fix bracket error 2017-04-23 20:40:16 -04:00
Joel Beckmeyer
2a697fecbf remove unneeded constructor 2017-04-23 20:39:39 -04:00
Joel Beckmeyer
1431660328 rewrite Radec.cpp 2017-04-23 20:37:16 -04:00
Joel Beckmeyer
a75cd9ee04 actually update readme 2017-04-23 20:32:31 -04:00
Joel Beckmeyer
4a5e49f8d6 Merge branch 'master' of https://gitlab.com/AluminumTank/radec 2017-04-23 20:30:52 -04:00
Joel Beckmeyer
cb2d47311e update readme 2017-04-23 20:30:43 -04:00
daniel
2307a6b304 Merge branch 'master' of https://daniel12997@gitlab.com/AluminumTank/radec.git 2017-04-23 20:30:19 -04:00
daniel
17dc12732c Make wire history better 2017-04-23 20:30:15 -04:00
Joel Beckmeyer
f64ee84269 add parseVector function 2017-04-23 20:15:12 -04:00
daniel
d08c7cb919 Add getName for wire 2017-04-23 19:59:57 -04:00
daniel
031fea3e0a Add a setOut to the gate parent class 2017-04-23 19:53:37 -04:00
daniel
2cacfb9dc0 Fix evaluate functions for gates to return an event 2017-04-23 19:46:37 -04:00
daniel
1846c25784 Nothing to worry about 2017-04-23 19:33:58 -04:00
daniel
0667c7ab88 Merge branch 'master' of https://daniel12997@gitlab.com/AluminumTank/radec.git 2017-04-23 19:29:33 -04:00
daniel
5d61e058b4 Fix the gate evaluate definition to return event 2017-04-23 19:29:29 -04:00
Joel Beckmeyer
c808dd3ec2 Merge branch 'master' of https://gitlab.com/AluminumTank/radec 2017-04-23 19:28:01 -04:00
Joel Beckmeyer
0d106c16fd rewrite Radec.cpp to use new Simulation class 2017-04-23 19:27:31 -04:00
daniel
63211c6c8e Merge branch 'master' of https://daniel12997@gitlab.com/AluminumTank/radec.git 2017-04-23 19:24:47 -04:00
daniel
7bf89ece15 Fix the class names in simulation .cpp 2017-04-23 19:24:33 -04:00
Joel Beckmeyer
419f108926 fix several more class capitalization errors 2017-04-23 19:20:29 -04:00
Joel Beckmeyer
66e5ae9418 finish fixing class names 2017-04-23 19:18:11 -04:00
Joel Beckmeyer
e5273f96e2 fix capitalization of classes 2017-04-23 19:13:23 -04:00
daniel
8cf81bed17 Added something to the TODO. 2017-04-20 13:02:48 -04:00
daniel
13d85a4651 Add the getter of delay in the gate classes. Add the findeWire and get delay functions for the simulation class. Fix the order of the input to: "in >> data" from "data << in". 2017-04-20 13:01:04 -04:00
daniel
959bca93c4 merge stuff 2017-04-20 12:42:47 -04:00
daniel
a5e16c9347 Add the simulation class and start populating it. 2017-04-20 12:41:43 -04:00
Joel Beckmeyer
850d4e0fbd fix a bunch of compile-time errors 2017-04-14 19:10:32 -04:00
daniel
1832d7adff Add the logic for the gates and fix the wire set and get value functions. 2017-04-11 13:22:37 -04:00
Joel Beckmeyer
5229141506 Merge branch 'master' of https://gitlab.com/AluminumTank/radec 2017-04-10 21:29:11 -04:00
daniel
7574ffc9a4 Fix base initialization for and, not , and xor 2017-04-10 21:28:44 -04:00
Joel Beckmeyer
010d572e0a fix stupid mistake 2017-04-10 21:28:10 -04:00