2017-04-23 19:13:23 -04:00
2017-04-20 13:02:48 -04:00
2017-04-23 19:13:23 -04:00
2017-04-20 13:02:48 -04:00

RADEC

TODO

  • implement vector file parsing
  • define all classes more completely
  • Add constructors for the gate classes which are used in the simulation class to make them.
Description
A simple, terminal-based boolean logic simulator
Readme 429 KiB
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C++ 99.4%
Batchfile 0.6%