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readme.md

RADEC

TODO

  • implement vector file parsing
  • define all classes more completely
  • Add constructors for the gate classes which are used in the simulation class to make them.
Description
A simple, terminal-based boolean logic simulator
logiclogic-circuitlogic-gatesterminal-based
Readme 429 KiB
Languages
C++ 99.4%
Batchfile 0.6%