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Joel Beckmeyer 4a5e49f8d6 Merge branch 'master' of https://gitlab.com/AluminumTank/radec
2017-04-23 20:30:52 -04:00
Radec
Fix the gate evaluate definition to return event
2017-04-23 19:29:29 -04:00
src
Merge branch 'master' of https://daniel12997@gitlab.com/AluminumTank/radec.git
2017-04-23 20:30:19 -04:00
.gitattributes
Add the basic class defineition for Wire and Gate.
2017-04-04 13:37:46 -04:00
.gitignore
Add the basic class defineition for Wire and Gate.
2017-04-04 13:37:46 -04:00
readme.md
update readme
2017-04-23 20:30:43 -04:00

readme.md

RADEC

TODO

Description
A simple, terminal-based boolean logic simulator
logiclogic-circuitlogic-gatesterminal-based
Readme 429 KiB
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