TnSb/radec

A simple, terminal-based boolean logic simulator

logic logic-circuit logic-gates terminal-based

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Joel Beckmeyer f365f0ab2b fix boolean name to be more accurate		2017-04-10 20:06:09 -04:00
Radec	Define the wire class	2017-04-10 18:57:03 -04:00
src	fix boolean name to be more accurate	2017-04-10 20:06:09 -04:00
.gitattributes	Add the basic class defineition for Wire and Gate.	2017-04-04 13:37:46 -04:00
.gitignore	Add the basic class defineition for Wire and Gate.	2017-04-04 13:37:46 -04:00
readme.md	implement event class	2017-04-10 17:15:05 -04:00

readme.md

RADEC

TODO

implement vector file parsing
define all classes more completely