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daniel 3a88044f67 Add the basic class defineition for Wire and Gate.
2017-04-04 13:37:46 -04:00
Radec
Add the basic class defineition for Wire and Gate.
2017-04-04 13:37:46 -04:00
src
Add the basic class defineition for Wire and Gate.
2017-04-04 13:37:46 -04:00
.gitattributes
Add the basic class defineition for Wire and Gate.
2017-04-04 13:37:46 -04:00
.gitignore
Add the basic class defineition for Wire and Gate.
2017-04-04 13:37:46 -04:00
readme.md
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2017-04-04 13:19:48 -04:00

readme.md

RADEC

TODO

everything

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Description
A simple, terminal-based boolean logic simulator
logiclogic-circuitlogic-gatesterminal-based
Readme 429 KiB
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C++ 99.4%
Batchfile 0.6%
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